Tech Jobs & Software Engineering Vacancies

35 vacancies found


Design Verification InternOffice Full Time0-2 yearsInternOther	Intel	Vietnam, Ho_Chi_Minh_City
Custom SOC IP Verification EngineerOffice Full Time8+ yearsHardware & Manufacturing	NVIDIA	US, CA, Santa Clara; US, TX, Austin
Software EngineerHybrid Full Time0-2 yearsJuniorEngineering	Siemens	Tunis, Tunisia
Software EngineerHybrid Full Time0-2 yearsJuniorEngineering	Siemens	Tunis, Tunisia
Senior ASIC Verification EngineerHybrid Full Time5+ yearsSeniorHardware & Manufacturing	NVIDIA	US, CA, Santa Clara; US, TX, Austin; Remote
ASIC Verification EngineerHybrid Full TimeHardware & Manufacturing	NVIDIA	India, Hyderabad
DFT Implementation EngineerOffice Full Time5+ yearsEngineering	Intel	US, Texas, Austin
Design Verification Student WorkerHybrid Full Time0-2 yearsInternOther	Intel	Mexico, Guadalajara
Senior VLSI Integration EngineerHybrid Full Time5+ yearsSeniorHardware & Manufacturing	NVIDIA	Israel, Tel Aviv; Israel, Beer Sheva; Israel, Yokneam; Israel, Raanana
Senior Design Verification EngineerHybrid Full Time10+ yearsSeniorEngineering	Intel	US, California, Santa Clara
Mixed Signal IP Verification EngineerHybrid Full TimeEngineering	Intel	India, Bangalore
Principal Engineer, AMS IP ArchitectureHybrid Full Time7+ yearsPrincipalEngineering	Intel	US, California, Santa Clara; US, Oregon, Hillsboro; US, California, Folsom; US, Texas, Austin; US, Arizona, Phoenix
CPU Pre-Silicon Verification EngineerOffice Full Time5+ yearsHardware & Manufacturing	Intel	US, California, Folsom
VLSI Design EngineerUpdatedOffice>14 days Full Time5+ yearsHardware & Manufacturing	Retym	Austin, Texas
VLSI Design EngineerUpdatedHybrid>14 days Full Time5+ yearsHardware & Manufacturing	Retym	Ramat-Gan (Tel-Aviv area)
Senior MXS Verification engineerUpdatedHybrid>14 days Full Time10+ yearsSeniorEngineering	Retym	Austin, Texas
Senior MXS Verification EngineerUpdatedHybrid>14 days Full Time10+ yearsSeniorEngineering	Retym	Ramat-Gan (Tel-Aviv area)
Mixed Signal Verification EngineerUpdatedHybrid>14 days Full Time5+ yearsEngineering	Retym	Ramat-Gan (Tel-Aviv area)
Mixed Signal Verification EngineerUpdatedOffice>14 days Full Time5+ yearsEngineering	Retym	Austin, Texas
ASIC Verification Technical-Lead EngineerUpdatedOffice>14 days Full Time10+ yearsSeniorHardware & Manufacturing	Retym	Austin, Texas